CS 203 Advanced Computer Architecture - Winter 2020

Course Information

  • Time and Location: Monday/Wednesday 9:30am - 10:50am @ Sproul Hall 2355
  • Instructor: Daniel Wong
    • Email: danwong@ucr.edu
    • Homepage: http://www.danielwong.org
    • Office: WCH 425
    • Office Hours: Monday 11am-12pm or by appointment
  • TA: Kiran Ranganath
    • Email: krang006@ucr.edu
    • Office Hours: Thursdays 2-3 PM @ WCH 459 or by appointment.
  • Piazza (for discussions): piazza.com/ucr/winter2020/cs203/home
  • iLearn (for assignments): ilearn.ucr.edu


Final exam moved to Wednesday, March 18, 11:30 a.m. - 2:30 p.m. online (iLearn)

Assignment 3 has been assigned. Due March 4.

Final Project has been assigned. Due March 18.

Assignment 2 has been assigned. Due February 10.

Assignment 1 has been assigned. Due January 22.

Welcome to CS 203!

Class Syllabus

Class webpage and communication

The class webpage is located at teaching.danielwong.org/cs203/winter20.

Information, resources, and announcements related to the class will be posted to the webpage.

In addition, we will be using ilearn for assignments, and piazza for discussions and help.

Course Description

This graduate level course cover topics in microarchitecture such as pipelining, branch prediction, instruction-level parallelism, dynamic scheduling, speculation, memory hierarchies, and parallel architectures. This course will be project-based. Projects are designed to allow students to gain computer architecture design skills, and to reinforce topics covered from lectures.

Prerequisite: CS 161


  • (Required) Computer Architecture: A Quantitative Approach, 5th Edition By Hennessy and Patterson
  • (Optional, another great reference book) Parallel Computer Organization and Design By Dubois, Annavaram, and Stenstrom

Grade Breakdown

  • Labs: 35%
  • Final Project: 20%
  • Exam 1: 25%
  • Exam 2: 20%
  • Class Participation and Extra Credit: 5%

Lab/Project Policies

  • You have 3 slip days that you can use on any one lab or combination of labs (except the final project). If you exceed your slip days, there will be a 15% penalty per late day (counting weekends). For group assignments, 1 slip day will be assessed to each group member.
  • No extensions for labs will be given (see slip days). Even if you're one minute late, it will be considered late.
  • All labs will be due at the end the due date (midnight).
  • All labs should be uploaded to iLearn.


  • You are responsible for all materials covered in lectures.
  • Cheating in labs, quizzes, projects, and exams are absolutely prohibited. The minimum penalty for a violation of the regulations will be a zero for the assignment; the maximum penalty will be failure in the course.
  • Examinations must be taken in class on the day they are given. There will be no exceptions.

Academic Integrity

Here at UCR we are committed to upholding and promoting the values of the Tartan Soul: Integrity, Accountability, Excellence, and Respect. As a student in this class, it is your responsibility to act in accordance with these values by completing all assignments in the manner described, and by informing the instructor of suspected acts of academic misconduct by your peers. By doing so, you will not only affirm your own integrity, but also the integrity of the intellectual work of this University, and the degree which it represents. Should you choose to commit academic misconduct in this class, you will be held accountable according to the policies set forth by the University, and will incur appropriate consequences both in this class and from Student Conduct and Academic Integrity Programs. For more information regarding University policy and its enforcement, please visit: http://conduct.ucr.edu.


You are expected to attend all lectures. While the slides contain all the information you need to know, some of the contents don't make sense unless you attend lecture. =)

Tentative Schedule

The following schedule is tentative and is subject to change.

You need to log in to Piazza to access slides

Date Topic Assignment Slides
Jan 6, M Introduction, Trends Introduction.pdf
Jan 8, W Pipelining Pipelining.pdf
Jan 13, M Performance Lab 1 - Pipelining Performance.pdf
Jan 15, W Simulators Simulators.pdf
Jan 20, M No Class - MLK Day
Jan 22, W Branch Prediction Lab 1 Due BranchPrediction.pdf
Jan 27, M Branch Prediction Lab 2 - Branch Prediction
Jan 29, W Out-of-Order Scheduling ILP-Dynamic.pptx
Feb 3, M Speculative Execution ILP-Speculative.pdf
Feb 5, W Midterm Review Samples.pdf
Feb 10, M Midterm Lab 2 Due
Feb 12, W Memory Hierarchy - Cache Organization Final Project Assigned Cache.pdf
Feb 17, M No Class - Presidents Day
Feb 19, W Memory Hierarchy - Cache Policies Lab 3 - Cache
Feb 24, M Computer Security - Guest Lecture Security.pptx
Feb 26, W Memory Hierarchy - DRAM DRAM.pptx
Mar 2, M Virtual Memory VM.pptx
Mar 4, W TLP/Accelerators Lab 3 Due TLP-DLP-Accel.pptx
Mar 9, M Final Review Samples.pdf
Mar 11, W Final Exam Moved to March 18
March 18, W Final Project Due @ 11:59:59pm
March 18, W Final Exam online (iLearn) 11:30 a.m. - 2:30 p.m.