CS 203 Advanced Computer Architecture - Winter 2021
Time and Location: Monday/Wednesday 9:30am - 10:50am Pacific time @ Zoom
Meeting ID: 936 0566 9322
Instructor: Daniel Wong
- Email: firstname.lastname@example.org
- Homepage: http://www.danielwong.org
- Office: not WCH 425 =(
- Office Hours: Monday @ 3PM
TA: No TA for this quarter
- CampusWire (for discussion board): https://campuswire.com/c/G788FE53A/
- Github Classroom (for assignment submission)
- iLearn (for grades and lecture videos on Yuja): http://ilearn.ucr.edu
Welcome to CS 203!
Class webpage and communication
The class webpage is located at http://teaching.danielwong.org/cs203/winter21
Information, resources, and announcements related to the class will be posted to the webpage.
This graduate level course cover topics in microarchitecture such as pipelining, branch prediction, instruction-level parallelism, dynamic scheduling, speculation, memory hierarchies, and parallel architectures. This course will be project-based. Projects are designed to allow students to gain computer architecture design skills, and to reinforce topics covered from lectures.
Prerequisite: CS 161
- (Required) Computer Architecture: A Quantitative Approach, 5th Edition By Hennessy and Patterson
- (Optional, another great reference book) Parallel Computer Organization and Design By Dubois, Annavaram, and Stenstrom
- Assignments: 35%
- Final Project: 20%
- Midterm Exam: 25%
- Final Exam: 20%
- Participation and Extra Credit: 2% bonus
- You have 3 slip days that you can use on any assignment (not project). If you exceed your slip days, there will be a 15% penalty per late day (counting weekends).
- Slip days CANNOT be applied to the final project. We need ample time to grade the last assignment before grades are due.
- No extensions for assignments will be given (see slip days). Even if you're one minute late, it will be considered late.
- All assignments will be due at the end on the day (midnight Pacific time).
- All assignments should be uploaded to iLearn or Github Classroom as specified.
- You are responsible for all materials covered in lectures.
- All assignments, quizzes, and exams are individual effort.
- Cheating in assignments, quizzes, projects, and exams are absolutely prohibited. The minimum penalty for a violation of the regulations will be a zero for the assignment; the maximum penalty will be failure in the course.
- Examinations must be taken in class on the day they are given. There will be no exceptions.
Here at UCR we are committed to upholding and promoting the values of the Tartan Soul: Integrity, Accountability, Excellence, and Respect. As a student in this class, it is your responsibility to act in accordance with these values by completing all assignments in the manner described, and by informing the instructor of suspected acts of academic misconduct by your peers. By doing so, you will not only affirm your own integrity, but also the integrity of the intellectual work of this University, and the degree which it represents. Should you choose to commit academic misconduct in this class, you will be held accountable according to the policies set forth by the University, and will incur appropriate consequences both in this class and from Student Conduct and Academic Integrity Programs. For more information regarding University policy and its enforcement, please visit: http://conduct.ucr.edu.
It's a pandemic. Attend if you can. =)
However, you are still responsible for keeping up with recorded course lectures and assignments.
The following schedule is tentative and is subject to change.
Note: You need to be logged in to iLearn for the lecture slide and YuJa links to work. The slides are also available directly in iLearn.
|1||January 4, M||Introduction, Logistics||Lecture 1||Introduction.pdf||Class Introduction|
|1||January 6, W||Architecture Trends / Pipelining||Lecture 2||ArchitectureTrends.pdf
|2||January 11, M||Pipelining (cont.)||Lecture 3||Assignment 1 Assigned|
|2||January 13, W||Performance||Lecture 4||Performance.pdf|
|3||January 18, M||No Class - MLK Day|
|3||January 20, W||Simulators|
|4||January 25, M||Branch Prediction||Assignment 1 Due
Assignment 2 Assigned
|4||January 27, W||Out-of-Order Scheduling|
|5||February 1, M||Speculative Execution|
|5||February 3, W||Midterm Review|
|6||February 8, M||Midterm Exam|
|6||February 10, W||Memory Hierarchy - Cache Organization||Assignment 3 Assigned|
|7||February 15, M||No Class - Presidents Day|
|7||February 17, W||Memory Hierarchy - Cache Policies|
|8||February 22, M||Memory Hierarchy - DRAM||Final Project Assigned|
|8||February 24, W||Virtual Memory|
|9||March 1, M||TLP / DLP|
|9||March 3, W||Accelerators|
|10||March 8, M||Final Review|
|10||March 10, W||Final Exam|
|Final||March 15, M||Final Project Due|